1. Field of the Invention
The invention relates generally to data networking and, more particularly, to a system and method for offloading a processor tasked with processing a regularly scheduled calendar.
2. Description of the Related Art
Effective flow control allows a processor to apply accurate Quality of Service (QoS) policies to the egress traffic. The effectiveness of the flow control determines the acceptable buffering depth of the egress interface. An egress interface can be any type of telecommunications interface that is used for transferring packetized data across a network, such as a Channelized OC-3, Ethernet, OC-12 Packet Over Sonet (POS), etc. Typically, a physical interface may be sub-divided into channels, such as multiple DS0s, DS1s or DS3s in an OC-3 physical interface. The channels may have multiple data buffers for storing packets awaiting to be transmitted over the physical interface. The purpose of having multiple buffers may be for implementing protocols such as Link Fragmentation and Interleaving (LFI) or for different data priority levels.
Ideally, the depth of the egress interface's buffers would be zero, so that the processor managing QoS could select the next packet to be transmitted at the very last moment. Since there is latency associated with sending a packet from the processor to the egress interface, some amount of buffering is required at the egress interface in order to keep the egress interface fully utilized.
A common scheme for reporting buffer status information (i.e., how full the buffer is) uses a calendar mechanism. In a typical, calendar-based reporting system, a serial stream of data is used to report the buffer occupancy status of all the buffers on a particular physical egress interface. The serial stream represents a rotating fixed-length calendar where each bit in the stream represents an event. In this embodiment, the calendar size is 65,535 (64K) event bits in length, which means that every 64K bits in the serial stream the calendar starts over. Each bit in the serial stream that makes up the calendar system is mapped to a specific egress buffer. The value of the status bit specifies whether or not there is room in the egress buffer to receive a block of data. A buffer may have more than one bit assigned to it depending on the rate that the buffer is drained, since the drain rate is proportional to the frequency that the flow control status needs to be reported for it. For instance, an OC-3's buffer may require that it report status twice within one calendar period (the time it takes to transmit the 64K calendar event bits). Therefore, an OC-12's buffer would require that it be reported eight times within a calendar period, because it drains its buffer at four (4) times the rate of an OC-3. The mapping of an egress buffer's status to specific bits within the calendar can be arbitrary. However, they should be equally spaced, so that the reporting points occur at an equal interval with respect to time. For example, the OC-3 interface may report its status at bit time 10 and 32,778, two equal distant points in a 64K calendar.
The processor receives the calendar-based status bits from the egress interfaces and stores them in memory for subsequent use by a traffic manager. The traffic manager in the processor uses the status information to determine whether or not to send a block of data towards that channel/interface.
One way of processing the calendar is to use brute force; that is, dedicate a sizable processor to the task of processing the calendar bit by bit and storing the status information in memory for subsequent use by the traffic manager. However, as the number of egress buffers to be managed grows larger, the frequency that the processor must receive status information increases. Therefore, the load on the processor increases, requiring more resources to be dedicated to processing egress buffer status. The timing of getting the status information for each channel's egress buffers and keeping the appropriate amount of data in each channel's egress buffer to prevent over-runs (loss data) and under-runs (under utilization of physical interface) becomes a daunting task.
Thus, there is a need for a means of reducing the load on a processor tasked with reading a calendar and a means for backing up the processor should it get overwhelmed and drop status information. By offloading the processing of egress buffer status information from the network processor or general processor to a device that is customized for the processing of this information, valuable compute resources remain available to allow for more feature processing to network data. The nature of the calendar-based status reporting system lends itself to a hardware-based solution due to the repetitive nature and well-defined processing requirements. Thus, the invention converts a calendar-based reporting scheme into an event-based reporting scheme, where event-based reporting is deemed to be less compute intensive.